This little known TLB coherency procedure can cost in performance, and in a big way. This video is about what TLB shootdown is, and what are the proposed solutions to making it less expensive.

While we're at it, this video also explains what the Translation Lookaside Buffer is, how the MMU works, and how the operating system maintains them all.

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Eventually consistent TLB: https://taesoo.kim/pubs/2020/maass:ec...
Intel's Remote Action Request: https://www.intel.com/content/dam/dev...

Patreon BBC Micro level supporters:
Yehuda T. Deutsch

Copyrighted works used in this video:
"Bell, Candle Damper, A (H4n).wav" by InspectorJ (www.jshaw.co.uk) of Freesound.org
Intel 5 Level paging image by WikiMedia user Bellezzasolo
https://en.wikipedia.org/wiki/Intel_5...

Table of contents:
00:00 Intro
00:34 The MMU
01:28 The Page Table
04:25 Translation Lookaside Buffer cache
06:34 TLB coherency
07:34 Kernel flow for (un)mapping a file
09:07 Reason TLB shootdown is necessary
11:53 TLB shootdown
12:47 Speeding up TLB shootdown
14:01 Hardware TLB cache coherency
16:35 Conclusions